Performance Analysis of NALU on aarch64

CG Auditorium
Srinath Vadlamani

Arm based SOCs have proven to be viable platforms for the complicated workloads in scientific HPC computing.   We will present performance analysis of the SIERRA Low Mach Module: Nalu (henceforth referred to as Nalu), developed at Sandia National Labs, applications on arm based ThunderX2, AWS Graviton2 and A64FX platforms (as long as access is given).  Single node memory, compute and thread performance will be presented for a production relevant test case.  We will present scaling performance on many-node systems.

Speaker Description: 

Practitioner of parallel HPC computing with a focus on scientific applications while considering algorithm enhancements acknowledging hardware performance efficacy. 

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